SBIR Phase I: Ultra-Efficient Data Center Power Conversion

The broader/commercial impact of this Small Business Technology Transfer (SBIR) Phase I project will center on the development of novel power converters and control schemes for an ultra-efficient rack-level data center power supply system. The data center industry presents a large and growing load on America’s power grid - approximately 200 billion kWh in 2022, roughly 4% of total domestic energy consumption. This rapid growth is straining utilities’ ability to provide power to future data centers and current customers. As a result, demand-side efficiency improvements may have an outsized impact. This project aims to develop extremely low-loss and high-density power conversion systems utilizing an innovative differential power processing system. Broadly, server power supplies are an estimated $2.9 billion market. Successful development of the proposed system will reduce energy consumption from the data center industry and may enable the deployment of power-hungry and economically critical AI technologies.

The intellectual merit of this project involves the development of converter topologies and associated control strategies that enable the integration of a differential power processing (DPP) approach into existing data center power distribution. The DPP approach has been successfully demonstrated at low-power in academia, but never deployed in real-world, kilowatt-scale systems. One important challenge that this project aims to address is interfacing the DPP architecture with the main data center buses. This will be achieved via two thrusts. The first will focus on legacy AC distribution systems, aiming to develop a highly efficient isolated three-phase AC power factor correction & rectification converter with current-mode control. This is not achievable with commercial off the shelf converters and necessitates novel topological innovation. The second thrust will center around integrating with emerging high voltage DC distribution systems and will involve developing converters with fault-tolerant control schemes unique to the DPP architecture. Both research directions will entail a combination of circuit simulation and physical hardware prototyping. Successful completion of the Phase I project objectives would substantially de-risk the DPP approach in data center environments and could enable full system integration and high-power demonstration.

This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.

Award Number: 2528149
Principal Investigator: Michael Solomentsev
Funds Obligated: $305,000
State: CO