SBIR Phase I: An Analog Hardware Accelerator for Power Systems Feasibility Studies

The broader/commercial impacts of this Small Business Innovation Research (SBIR) Phase I project are to enhance national energy security and maintain U.S. competitiveness in key technology areas including high-performance computing. Connecting new energy resources and loads, like advanced nuclear power plants and large-scale data centers, currently involves complex studies that can take years, creating a major bottleneck that increases costs and delays deployment. This project introduces a new type of hardware that can run these critical simulations thousands of times faster, reducing study times from months to days. This innovation will help utilities and energy developers bring new power projects online faster and at a lower cost. The technology provides a durable competitive advantage through its unique hardware design. The initial market will be utility companies and engineering firms, addressed through a cloud-based, pay-as-you-go service model.

This Small Business Innovation Research (SBIR) Phase I project will address the computational limitations of simulating modern power systems. The slow speed of conventional digital software makes it difficult to analyze the complex dynamics of today’s electric grids. The primary research objective is to advance a proven analog computing architecture from a circuit board prototype to a scalable, integrated circuit. The proposed research involves the complete design and verification of a custom system-on-chip using a standard semiconductor process. This analog processor is designed to solve the full AC optimal power flow problem, a highly complex and nonlinear challenge. The project will also develop a software interface to allow the hardware to be controlled by existing industry-standard simulation tools. The anticipated technical result is a finalized, manufacturable chip design capable of simulating a standard 118-bus network with an accuracy of less than one percent error compared to traditional methods.

This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.

Award Number: 2527695
Principal Investigator: Palak Jain
Funds Obligated: $305,000
State: CA